EUROPEAN COMMISSION FP7 ICT objective 3.1 "Next Generation Nanoelectronics Components & Electronics Integration"
FP7 ICT objective 3.1
"Next Generation Nanoelectronics Components & Electronics Integration"
Specific Targeted Research Project
DUALLOGIC, a top ranked project, is the "flagship of CMOS in FP7. The aim is to develop a high mobility dual-channel Front-End of Line technology as an option for (sub)-22 nm high performance logic ICs. Unlike the present day devices which are all made of Si, we propose that the active channel of pMOS and nMOS transistors in future nanoelectronics could be made of different high mobility semiconductor materials. In particular, we propose that pMOS are made of Ge and nMOS are made of III-V compound semiconductors co-integrated in the same complex engineered substrate as shown in the Figure below.
Contact: Dr. A. Dimoulas,
web master: Dr. Georgia Mavrou